University of Texas, Dallas - CS 4141pre-lab-2.

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CS 4141 Pre-Lab 2: MUX and Decoder Student: Nikhil Mishra Section: 102 Date: 9/28/19 (This pre-lab has 4 questions) Q1​: Below on the left is the logic symbol for a 4:1 Multiplexer (MUX). You ... can copy this symbol to make logic diagram later in the report. On the right is the 4:1 MUX IC diagram (same diagram is on second page of ​ic_diagrams.pdf​). On the right of the IC diagram we have a piece of Verilog code that describes how the MUX works. Read the code and answer the following questions: - How many select bits we have in a 4:1 Mux? 2 - Which select bit is the most significant bit? S1 - Suppose S1 = 1, S0 = 0 and 1G = 0, then which signal will be assigned to output 1Y? 0 - Now we still have S1 = 1, S0 = 0 but 1G = 1, then what will 1Y be? 1D2 - Notice that we also have another set of inputs 2D and output 2Y. Explain how 2Y is related to 2D in one or two sentences. 2D are the inputs that are create the selection for output 2Y [Show More]

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